The present invention is generally directed to methods and systems for transferring a plurality of blocks of data of varying size to a memory that includes error correction code (ECC) capabilities that are applied to portions of the memory that are not changed when new data to be stored is received, particularly when that data does not fall on memory address boundaries corresponding to the error correction boundaries for the memory. More particularly, the present invention is directed to a system and method for ensuring that data written into an ECC protected memory word includes already-written data when the amount of data being written is less than a full ECC protected word. Even more particularly, the present invention is directed to a system and method which employs tags associated with data blocks that may or may not span multiple ECC protected memory words.
The present invention is particularly useful in data processing systems employing or including a plurality of nodes. Each of these nodes may include one or more processors. Either at the node level or at the processor level, but more typically at the node level, it is typically the case that data is to be sent elsewhere, that is to other nodes or processors in the same data processing system or to nodes or processors in remote systems. The link to “elsewhere” in many systems is an adapter, also known as a communications adapter. More particularly, in systems marketed and sold by the assignee of the present invention, this function is provided by what is referred to as a host channel adapter (HCA). It is the function of the HCA, and similar communication adapters, to assemble a plurality of blocks of data of varying length into a data packet. The data packet thus includes one or more, and typically multiple, data blocks. Each one of the data blocks typically includes a different number of bytes. The HCA includes an addressable memory in which the data packets are assembled prior to their transmission out of the adapter to “elsewhere.”
Because of increases in interprocessor communication rates, it is also desirable to increase the memory buffer resources on host channel adapters (HCAs). Thus, it is also seen that it is desirable to increase the density of memory devices that are used in host channel adapters. Because of this increase in memory density, there is an increase in the probability of bits errors due to the well known problem of alpha particle interactions. Since this leads to an increase in the bit error rate for stored data, it is sensible for HCA vendors to use Error Correcting Code (ECC) to protect the HCA memory contents. Typically, an ECC implementation covers multiple bytes of data with a single set of ECC check bits used for error detection and for error correction. For example, a set of 8 ECC check bits is found to be typical for protecting 64 bits of data, that is, for protecting a single data word (see below for the meaning of “word” as used herein).
As used herein the term “word” in reference to the memory that receives data refers to the number of bytes that go into the computation of check bits used by ECC circuitry in the memory. It also refers to the quantity of data that is written into the memory at one time, that is during one write cycle operation. It is also noted that herein one is not necessarily limited to “bytes” of data that are always 8 bits long. This is not an attempt to change the commonly accepted definition of what constitutes a “byte,” but rather is merely an indication that the present invention is not limited by the number of bits written into or read from the receiving memory at one time. It is this amount of data that is protected using redundant bits provided by any convenient error detection and/or error correction method.
If data to be written to the memory were supplied in quantities that always fell on word boundaries for the memory, there would be no problem. However, in situations such as the one addressed by the present invention, a major function of the HCA (or any similar device) is the assembling of packets of information from a plurality of blocks of data (say, from l to n blocks) with each block containing a variable number of bytes (say, from l to m bytes). In this situation chunks of data arrive which do not fall on word boundaries of the memory in the HCA device in which packets for transmission are assembled.
When only a portion of a data word in an ECC protected memory is to be modified, all of the bytes of that data word are still used internally in the memory for the calculation of new check bits for that data word. Thus, a read-modify-write operation is typically performed: the complete addressed data word is read from the memory before the new ECC can be calculated and the new data word written into the memory. It is one of the objects of this invention to eliminate the need for performing this read operation since it is otherwise a constraint on the bandwidth of the HCA and also on the bandwidth of the data processing system in which it is employed.